文献类型： 会议论文
第一作者： Yingying Liu
作者： Yingying Liu 1 ; Yu Fu 1 ; Likang Zhang 1 ; Zhihui Wang 1 ; Ke Shi 1 ; Pei Liu 1 ; Zhipeng Mei 2 ;
作者机构： 1.China Academy of Aerospace Standardization and Product Assurance (CAASPA), Beijing, China
2.Xi'an Microelectronic Technology, Xi'an, China
关键词： Wiring;Semiconductor device reliability;Process control;Production;Quality control;Inspection;Silicon;Through-silicon vias;Integrated circuit reliability;Standards
会议名称： International Conference on Reliability,Maintainability and Safety
主办单位：
页码： 79-83
摘要： The growing trend of low power consumption and small size poses challenges to two-dimensional (2D) integrated chip production. Through silicon via (TSV) interposer is a key structural unit for 2.5D/3D integration that can achieve vertical interconnection of chips and reduce the length of lead wiring. However, the quality and reliability evaluation standards for TSV have not yet been fully established, as TSV is a new high-density packaging process with a complex structure. Therefore, this paper focuses on a TSV silicon interposer. Based on its structure characteristics and actual production-line data, an in-depth analysis of typical failure modes and mechanisms is conducted. Drawing on the experience of wafer-level manufacturing, inspection methods are introduced and modified to accommodate the TSV silicon interposer process, such as wafer double-sided flying needle testing. By improving the assessment requirements for film-forming substrates in traditional hybrid integrated circuits, the reliability evaluation method for the TSV silicon interposer process has been proposed, which can provide a reference for production, quality control, identification inspection, reliability assurance, and subsequent assessment standards of products based on TSV.
分类号： tp309-53
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